1. Field
Apparatuses consistent with example embodiments relate to an integrated circuit (IC), and more particularly to an IC including an embedded memory device for performing a dual-transient word line assist using a triple power source and a device having the IC.
2. Description of Related Art
A minimum voltage of a static random access memory (SRAM) may be lowered to make a low power-high efficiency application processor. However, a degree of integration of a semiconductor circuit is further refined in a latest process, and thus parasitic components tend to be increased in the semiconductor circuit. Because a supply voltage supplied to the SRAM is gradually scaled down (or reduced), an SRAM of good quality becomes difficult to design. In addition, due to quantized width processing characteristics of a fin field effect transistor (FinFET), a bit cell of an SRAM having an optimum performance becomes difficult to develop. For this reason, a design of an assist circuit is a factor in designing a low power and high efficiency SRAM.